CW1173, ERROR:root:Target did not ack

Hi,
I use CW1173-lite with target STM32F, and run the CPA analysis ( Tutorials: PA_CPA_1-Using_CW-Analyzer_for_CPA_Attack).
It works well in default setting, but when I change the “scope.clock.clkgen_freq” from 7.37MHz to other frequencies, within allowable range, the error shows:

ERROR:root:Target did not ack
WARNING:root:Timeout in OpenADC capture(), trigger FORCED
WARNING:root:Timeout in OpenADC capture(), trigger FORCED
c:\cw\git\chipwhisperer\software\chipwhisperer_init_.py:289: UserWarning: Timeout happened during capture
warnings.warn(“Timeout happened during capture”)
WARNING:root:Timeout in OpenADC capture(), trigger FORCED
WARNING:root:Timeout in OpenADC capture(), trigger FORCED
.
.
.

What’s the problem?

Thanks.

The serial link’s baud rate is tied to the clock, so if you change the clock, you also have to scale the baud rate accordingly. The baud rate for the default 7.37 MHz clock is 38400; set it to match your clock with:
target.baud = X

Jean-Pierre

Hi,

thanks for your reply.
i tried to increase the baud rate, but it didn’t work. (i use 96000, 115200 etc,.)

so, could you please tell me the relationship between the clock and baud rate of CW1173?
for example, my clock changes to 12MHz, how to change the baud rate accordingly?
and does the target STM32F also need to change baud rate?

thanks you.

It’s a linear relationship; if you increase the clock to 12 MHz, that’s an increase of 12/7.37 = 1.628, and so you should set the baud rate to 38400 * 1.628 = 62524.

Don’t change anything on the target side.

Jean-Pierre

Hi JP,
Working well, thank you very much !

Hi JP,

But i found that the frequency only can up to 49MHz,
when above 49MHz, the same problem encountered (i set scope.clock.adc_src = “clkgen_x1”).
I remember that the ADC’s sampling frequency can up to 105MHz maximum.

when i set scope.clock.adc_src = “clkgen_x4” and frequency=20MHz,
the ADC’s sampling freq can up to 80MHz, (adc_freq = 79999992),
But when i set frequency > 20MHz to get higher ADC’s sampling frequency,
another problem shows at programming the target (cw.program_target(scope, prog, fw_path)):

Failed to detect chip. Check following:
1, Connections and device power.
2, Device has valid clock (or remove clock entirely for internal osc).
3, On Rev -02 CW308T-STM32Fx boards, BOOT0 is routed to PDIC.

Thanks.

Most likely your target doesn’t have a valid clock anymore; this will prevent it from being programmed.
The CW capture hardware has limits on the sampling clock it can generate, but the target will have its own limit as well, maybe you’ve exceeded it.

Since you have it working with the clock set to 7 or 12 MHz, what exactly are you trying to achieve? Why do you want to use a faster clock?

Jean-Pierre

Hi JP,

Thanks for the suggestion.
I do the faster clock is for academic research, we would like to crack some high frequency encryption engine.

Thank you.