Hello guys, I try to do some captures in CW308 UFO board using the target S6LX9 to program a FPGA architecture in the board, then make captures to get traces from this experiment. Therefore, I’m trying to test another type of AES, so it’s a custom AES and I want to grab these traces to analyze for my work at university. But when I go to the jupyter I’d this warning from my console:
So I think it’s problem in time to capture from the CWLite when I trigger my architecture, but I don’t know where I can look to seek this error or issue because I triggered after finished all rounds in my architecture because I do two AES to do different times rounds of AES in this both module. I try to put my trigger in IO4 after the second AES finished. See the results in ModelSIM. I need some help to debug this and fix.