First, the bsfile and fpga_id arguments are redundant and shouldn’t be used together. fpga_id is used to load our reference target bitfiles, so if you want to load your own bitfile, use bsfile and remove the fpga_id argument.
Second, as per the message, it looks like you may be attempting to load a bitfile which targets a different FPGA? What is the target part in your Vivado project? It must be either 7a100tftg256 or 7a35tftg256, depending on which FPGA is on your CW305 board.