Can't write 64 bytes with fpga_write in AES example

1

I’m modifying the AES CW305 example, and one thing I’m doing is increasing pKEY_WIDTH to 512. However writing to target.REG_CRYPT_KEY doesn’t seem to be working with target.fpga_write(target.REG_CRYPT_KEY, cw.util.CWByteArray(<my 64 bytes>)[::-1]) and target = cw.target(scope, cw.targets.CW305, bsfile=<my bitstream>, force=True, fpga_id=fpga_id, platform=platform).

Working back through the repo, this seems to be calling (in software/chipwhisperer/hardware/naeusb/naeusb.py via software/chipwhisperer/capture/targets/CW305.py)

  def cmdWriteMem(self, addr : int, data):
      """
      Send command to write memory over external memory interface to FPGA. Automatically
      decides to use control-transfer or bulk-endpoint transfer based on data length.
      """
      pload = util.get_bytes_memview(data)
      if len(pload) < NAEUSB_CTRL_IO_THRESHOLD:
          self._cmd_writemem_ctrl(addr, pload)
      else:
          self._cmd_writemem_bulk(addr, pload)

      naeusb_logger.debug("FPGA_WRITE: bulk: {}, addr: {:08X}, dlen: {:08X}, response: {}"\
          .format("yes" if len(pload) >= NAEUSB_CTRL_IO_THRESHOLD else "no", addr, len(pload), data))

        return None

with NAEUSB_CTRL_IO_THRESHOLD = 48 (in software/chipwhisperer/hardware/naeusb/naeusb.py).

I think I’ve run into this before and got an answer of some kind, but my question is: Can I safely increase 48 to 64 (doing so didn’t seem to fix my problem)? Other questions/answers on this forum suggest that I should be able to write 1024 bits to the cw305_reg_aes.v registers. FWIW, I pulled the above references/code from the current version of CW and the firmware on the Husky and CW305 are up to date.

2

Thanks for reporting the issue. This did work in the past, but it seems it got broken again at some point. I’ll see if I can get the firmware fixed up.

Alex