Hi -,
I am using Xilinx Vivado ML suite for CW305 target board. I am trying to add/reprogram the target board, so I wonder if there is a constraints file somewhere.
Thanks,
Hi -,
I am using Xilinx Vivado ML suite for CW305 target board. I am trying to add/reprogram the target board, so I wonder if there is a constraints file somewhere.
Thanks,
Sure - there is https://github.com/newaetech/chipwhisperer/blob/develop/hardware/victims/cw305_artixtarget/fpga/common/cw305_main.xdc
which is used for our example AES project.
Thank you very much!