CW305_ECC target clock question

Hi, I want to ask about the reason we only can increase the target clock up to 50 MHz

Because recently I put my design Montgomery algorithm into the target and hope they can run in 100 MHz. I saw the datasheet of cw305, and its PLL Output Range is up to 200 MHz, so the target clock up to 50 MHz is just for this case?


There is no reason why you can’t; from what I remember, there just isn’t much benefit in going faster. Past a certain clock speed, captures don’t get any faster due to the overhead of everything else that’s around the target (e.g. dispatching jobs and reading the power samples).