CW305 following input text on AES vivado simulation

sasalamol · April 1, 2022, 5:11pm

Hi!
How can I set and follow an input text through the AES algorithm on the Verilog example project simulation?

Can I set the value directly from the simulation test bench?
Do I need to make any configurations for the simulation in order to get the correct results?

Cheers

jpthibault · April 1, 2022, 5:23pm

The input is set by the testbench here:

github.com

newaetech/chipwhisperer/blob/develop/hardware/victims/cw305_artixtarget/fpga/vivado_examples/aes128_verilog/sim/tb.v#L118

    
      
          k16_sel = 0;
          k15_sel = 0;
          l14_sel = 0;
          pushbutton = 1;
          pll_clk1 = 0;
          
          
#(pUSB_CLOCK_PERIOD*2) pushbutton = 0;
          #(pUSB_CLOCK_PERIOD*2) pushbutton = 1;
          #(pUSB_CLOCK_PERIOD*10);
          
          
write_bytes(0, 16, `REG_CRYPT_TEXTIN, {32'h12345678, 32'habcdef01, 32'h87654321, 32'hdeadbeef});
          write_bytes(0, 16, `REG_CRYPT_KEY, {32'habcdef01, 32'h12345678, 32'hdeadbeef, 32'h87654321});
          
          
$display("Encrypting via register...");
          write_byte(0, `REG_CRYPT_GO, 0, 1);
          repeat (5) @(posedge usb_clk);
          wait_done();
          read_bytes(0, 16, `REG_CRYPT_CIPHEROUT, read_data);
          if (read_data == expected_cipher) begin
             $display("Good result");
          end

From what I can see on your simulation waveform it looks like a number of things are going (like the missing clock) so I’d look into resolving that first.

sasalamol · April 1, 2022, 5:32pm

Does the “aes128_verilog.xpr” example include this tb.v simulation file or should I define them?

jpthibault · April 1, 2022, 5:40pm

No, this simulation is run with “make” in the same directory where you find tb.v.
It’s possible to add the testbench to the Vivado project, but I vastly prefer running simulations with iverilog.

sasalamol · April 12, 2022, 7:50am

Hi,
I’ve tried to use Icarus for the simulations but it’s my first time can you share the commands that I need to use?

I put the necessary files in the same directory with the iverilog, and entered the following command but I got these errors:

So what should I do to proceed?

jpthibault · April 12, 2022, 2:07pm

Why don’t you just run make compile? It calls iverilog with all the required arguments. In this case I think you’re missing -g2005-sv.