DDR as OpenADC sample buffer?


Thanks for creating the OpenADC board, and for making it open source.
I’ve just ordered one (order 1671), and have a question.

I’d like to have a really big sample buffer, far larger than what can
be stored on the fpga. So would like to transfer the incoming samples from the
flash adc in DDR on the LX9, and transmit them later (at non realtime rates) to a
PC host over usb.

In an earlier forum posting you mentioned:

The DDR code wasn’t fully implemented… I think it was used at one point,
but it might take some work to get it working with the latest FPGA code.
Right now it’s basically limited to around 30k samples, due to the size of the FPGA.

  1. Are there any issues you can think of which would prevent the transfer of 8 bit
    samples at 100 Mhz into the LX9 SDRAM? (I’m not familiar with the LX9 memory archtecture.)

  2. Do you recall what parts of your DDR implementation were not completed?

Any advice you may be able to offer before I attempt this would be appreciated.



There isn’t any real issues - the speed should be fine as the DDR is running much faster than required. I think most of the remaining “issues” were in validating the in-between logic.

You can see the current DDR code at assembla.com/spaces/openadc … ce.v#ln273 . There is some “validation tests” that just put constant or known changing (i.e. a ramp) onto the input. This is useful as makes it a lot easier when seeing if things are working, you are missing samples, etc.

Thanks for the quick reply and your confirmation that this should be possible.

And I understand how storing various patterns, or even simply a ramp, will be useful
when debugging the memory i/o.

Am waiting for my order (1671) to arrive as I am keen to make this work.

Great, let me know! BTW hopefully you received your order already - tracking showed it delivered for pickup on Monday.