Executing secAES-ATmega8515 on ARM CW

[jpthibault]

secAES-ATmega8515 was developed for an 8-bit AVR, so not the best choice for a Cortex target.
Why don’t you look at the other options mentioned here:

Masked AES implementation code or file

Sorry for the delay. Indeed I’ve been working on 3 implementations of masked/bitsliced AES for Cortex-M: the one from ANSSI that Alex mentioned, the one from “knarfrank”: https://github.com/knarfrank/AES-128-ARM-Cortex-M0 the one from Sebastien Riou: https://github.com/sebastien-riou/masked-bit-sliced-aes-128 The two implementations from ANSSI (the one for AVR and the one for Cortex-M4) have configurable masks (AVR expects 2 configuration bytes followed by 16-byte mask and ARM implementati…