How Can I work with large output data size in CW305

I am using CW305 for some project where the data I want to return from the board is 512bits. There data_o is defined as 128bit. If I need to work with much larger data size is that possible and what should be the ideal way to do that? I have worked with 256bit key before but that was already defined and straightforward.

There shouldn’t be anything complicated about this.
Data gets returned over an 8-bit wide interface, and in our example AES implementation we allow for each register address to return up to 2^7 bytes = 1024 bits.
If that’s not enough you can either modify the pBYTECNT_SIZE parameter, or split things across multiple register addresses.

@jpthibault Thanks for the reply.

To read 265 from CW305, I have tried the following:

  1. Changed pPT_WIDTH and pCT_WIDTH to 256 in cw305_top.v

  2. Changed wire [127:0] aes_pt; and wire [127:0] aes_ct; to wire [256:0] aes_pt; and wire [256:0] aes_ct; in cw305_top.v

  3. Changed pPT_WIDTH and pCT_WIDTH from 128 to 256 in cw305_reg_aes.v

  4. Changed data_o and 0 size to [255:0] in aes_core.v

My aes_core.v is written to just send whatever it gets in data_i port. below is the code:

module aes_core (
	input wire clk,
	input wire load_i,
	input wire [127:0] key_i,
	input wire [255:0] data_i,
	input wire [1:0] size_i,
	input wire dec_i,
	output reg [255:0] data_o,
	output reg busy_o
);
reg [1:0] fsm;
localparam INIT = 2'b00;
localparam SEND = 2'b01;
localparam FINISH = 2'b10;
always @(posedge clk)
begin
busy_o <= 0;
	if(load_i)
	begin
		busy_o <= 1;
		data_o <= 0;
		fsm <= INIT;	
	end
	else if(busy_o)
	begin
		busy_o <= 1;
    case(fsm)
       INIT: begin
           fsm <= SEND;
       end
       SEND: begin
            data_o <= data_i;
            fsm <= FINISH;
       end
       FINISH: begin
           busy_o <= 0;
       end
    endcase
	end
end
endmodule

I am sending text = bytes([0xff, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0xf3, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0xbb]) in data_i as text but seeing the following as output:

111111111111111111111111111111bb the last 128 bits of data_i. What may go wrong in this case? I am expecting 256 bits at data_o.

Nothing jumps out as being obviously wrong. I recommend you debug in simulation. Once that’s working, try it on the CW305. If there are still issues, then use ILAs to help narrow down the problem.

(I’d also recommend that you simply start with adding a large register to cw305_reg_aes.v, that can be read and written; once that works, build on from there.)