How to utilize others cryptographic architectures (FPGA) on CW308

Hello guys,

I have some doubts with the Chipwhisperer 308 when I try to put others cryptographic architecture for create bitstream and attack them. I was using the AES 128 bits that have on folders for GitHub, but I want to analyze other implementation like AES GALS or Pipeline for AES. I try to put this architecture on board GCM-AES that I use from opencores (, but on this architecture has others signals and wire/reg that don’t have on the implementation in chipwhisperer, yes I knew these architectures have that but where I can change on top-level from Chipwhisperer 308 UFO Target and my target is S6LX9 that I got it to make bitstream on ISE.

Warm Regards, Vinícius

Hi Vinicius,

The project file for AES implementation we provide for the CW308 FPGA target is here:

In it you’ll see the Verilog source files that it uses.

I’m not sure how much experience you have with Verilog, but you’ll need at least some basic knowledge in order to port a different design to the CW308 target environment. Wires and regs are internal signals. What will matter to you are the inputs and outputs; that’s what needs to line up.

That said, the opencores example you provide appears to have a similar interface, minus the UART interface that our design uses to communicate with the ChipWhisperer platform.