Hello, I need help understanding some of capabilities of the ChipWhisperer lite board. I ran several clock glitching experiments with mixed results, and I would like to take a look at the clock glitch output the board generates. I do not have access to an oscilloscope at the moment, so I was looking to use the ChipWhisperer board. Would it be possible to somehow connect the glitch output to the measure port, in order to sample the clock glitching signal? Is it possible to feed an external clock to the ADC, different from the one generating the glitch? I guess a faster sampling clock would be required in order to have any significant measure, due to the glitch duration being less than a clock period. I checked your docs but I’m not sure I’m reading it correctly, because I saw you mentioned an external clock input for the ADC but I have issues identifying it.
I would appreciate any insight on this,
Thanks.
First, when you say that you have mixed results with clock glitching, understand that this is normal; glitching is not deterministic.
To use an external clock for ADC sampling, you need to provide that clock on the HS1 pin of the 20-pin connector, and set scope.clock.adc_src = "extclk_x1" (or …x4 if you wish).
Now as far as using CW as a scope to look at the glitch output, I’m not sure if you’ll see something useful, because CW isn’t intended to be a general-purpose oscilloscope. But don’t let that stop you from trying! Keep in mind it is AC-coupled.
You’ll also want to set:
scope.clock.clkgen_src = 'system'
scope.glitch.clk_src = 'clkgen'
and make sure scope.clock.clkgen_freq is set to something slow relative to your external clock (minimum is 5 MHz).
Finally, the “coming soon” CW-Husky actually has a feature to do exactly what you’d like to do here: it has as small internal “logic analyzer” which captures the internal signals involved in generating glitches, so you can better understand and visualize the effect of the glitch parameters. Unfortunately the CW-lite FPGA doesn’t have space for this.
First, when you say that you have mixed results with clock glitching, understand that this is normal; glitching is not deterministic.
Absolutely, I know that, I was trying to explain why I am trying to look into the glitching signals.
Thanks for your answer. I will try to look into it, and report back if I get something useful.
EDIT:
I was wondering if it would be possible to modify the FPGA firmware in order to generate the required clock internally. Do you have any insight on that?
Finally, the CW-Husky would be interesting to have, do you have any ETA on it?
I’m not following, what additional clock do you want to generate?
For Husky, watch the Crowd Supply page: ChipWhisperer-Husky | Crowd Supply
We’ve been saying this for a while, it’s just a victim of the usual semiconductor supply-chain issues.
I wanted an alternative to the external clock. Nevermind, after looking into the schematics, I ended up doing the opposite of what you suggested. I set scope.clock.clkgen_freq to 100MHz and used the feedback clock from the CW308 to clock the glitch hardware. Then I just connected the output glitched clock (hs2 pin) to the measure port in CW Lite. Doing that I was able to observe the glitches, although with a pretty bad resolution due to the few sample per period.
Thank you for pointing me in the right direction!
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