I’m trying to find a way to get a GPIO (eg. TIO4) to be pulled low for a fairly precise amount of time. I am currently just doing:
scope.io.tio4 = False # time.sleep(some_value) scope.io.tio4 = True
This results in roughly 1.5 - 2ms pulse without the sleep, which makes sense I guess, it needs to send a message to CW for each of those lines.
Can anybody think of a better way?
I’m trying to reboot a victim chip by switching its VDD off using a MAX4619. The reason is the code I am trying glitch is only reachable once after POR (Power-On Reset) and there isn’t another way to achieve POR on this device (to my knowledge). RESET pin does not get me to that state.
Turning the VDD off for a fairly variable time of 1.5 - 2ms results in the boot process shift by tens of microseconds or more, which obviously messes with my timing/triggering.
I did already verify I can achieve a mostly stable timing by switching its VDD to GND using MAX4619 for a set/stable amount of time (eg. 5us, or almost any other time as long as it is the same every time) using a random FPGA dev kit.
I thought having a similar feature in the CW ecosystem would be nice.
Do people also run into weird situations like this? Is this a feature that makes sense to spend time on?
I’d try to implement/contribute it if so.
Maybe someone can think of a better way that is easier to implement on CW.