Protecting code to have more difficult power signature against SAD trigger on ARM?

Before Husky became popular we used to do randomize timings with things like SysTick randomization and HW timers.

Though with SAD trigger that is not that much helpful.

Is there a way e.g. xorfuscator/movfuscator for ARM, does not have to be single instruction (would be impossible to do on ARM). Maybe something like polymorphic code or using things like blinding polynomials to randomize power trace? Blinding was used for RSA and ECDSA for long time now, but we want to do it on pieces of generic code (for simplicity something that just accesses RAM and no other HW).

I don’t think there’s any generic methods of defending against side channel attacks - defense will always depend on what you’re doing. Things like blinding/masking are good to implement, but may not always be applicable.

Also, defeating things like randomized delays has always been possible via software resynchronization. The SAD trigger can be a very useful and convenient way to trigger, but IMO it doesn’t do too much to make new attacks possible.