Ultrashort TL;DR summary
I am always getting error
ADC errors = segmenting error, mismatch in
scope.SAD.num_triggers_seen == scope.adc.segments, there is an assert on it in
02 - Husky Triggers.ipynb under the “SAD Triggering section” no matter what parameters I set up:
assert scope.SAD.num_triggers_seen == scope.adc.segments
I tried to experiment with
scope.adc.gain from 16 to 20 to avoid “gain too low”, currently at 18 which looks good for everything else. Changed around
scope.adc.samples to lower (90, 300, 600), tried to change
scope.SAD.threshold to 80 or 90 (or even 1000 just to get feel what the results will be).
If triggers seen is less than
scope.adc.segments, then I get FIFO errors as well, sometimes
presample error when I made the params way out of bound.
I wasn’t able to find out the correct params to make that assert valid, go through SAD multiple capture trigger without any error, and there’s too many of parameters.
I’ve already spent 3 days looking through the data and docs, but still don’t have very good idea at what I am doing wrong. I don’t know what I am looking for since there is no example data in some screenshot (or pickled…) to compare to mine to to know that I am off way to the moon with parameters of mine.
(I always powercycle everything and kill jupyter server between each experiment to know we’re starting freshy fresh.)
02 - Husky Triggers.ipynb(I only added print
scope.errors.clear()while experimenting, aside from changing around paremeters as described above)
- Setup: CW Husky + CW308 UFO board + STM32F303 target
- CW version: commit
534fe4881bb54723eb43df465cc54b406d9ccc4ffrom Mar 20 2023 (later than 5.7.0) on Linux
I will first show the few triggers that are working so that we/you can see if it’s right, seems right to me, but I don’t have much to compare to.
ADC and SAD first look and work OK until I get to the multiple segment part
So basically starting
02 - Husky Triggers.ipynb, I just run the first 4 cells to acquire CW scope, program and reset STM32F303 target.
Then I continue onto “2. ADC level triggering” part
So this kinda looks reasonable as the first trigger graph (from TIO4 IIRC?), right? 10 round of AES, plus one extra for initial key addition (vanilla
hardware/victims/firmware/simpleserial-aes/simpleserial-aes-CW308_STM32F3.hex demo, compiled without any modifications).
Second graph where we see the absolute difference in red on ADC trigger, which looks OK:
First SAD trigger in demo looks also right:
Now here is when we run in trouble with the SAD multiple triggers
Here I always get some error,
segmenting error is the most common, no matter how I tune the variables (mentioned at the beginning like gain, samples, threshold…). I am lost at this point.
I always either get more
scope.adc.segments otherwise FIFO or other error will happen.
Is the assert right though? Must it be exactly the same? It’d make more sense to allow more triggers seen than segments maybe?
the condition for starting the capture of the next segment came true before the capture of the current segment completed. Reduce the segment size and/or increase the time between segments.
I can’t figure out what to change to make it right.
Then just for the fun of it I let generate it graph from the data which I am not sure if it means anything useful, but just for reference:
Thanks for reading this, I’ve been writing this report for a few days.