Hello, I want to modify the oscilloscope sampling frequency and chip running frequency because I personally want to use dozens of sampling points to represent a cycle of the chip needs.
I found that I can directly modify the clock period of the chip, but because of the existence of “adc_src = clkgen_x4”, the property is read-only, please tell me how I can customize the sampling frequency.
ChipWhisperer is meant to sample the target synchronously: either it provides the clock to the target, and scope.clock.adc_src is set to clkgen_x1 or clkgen_x4, or the target provides its clock to ChipWhisperer, and scope.clock.adc_src is set to extclk_x1 or extclk_x4. In both cases you are limited to 1 or 4 samples per clock.
If you want more samples per clock, you’ll have to decouple the sampling clock from the target clock (e.g. target generates its own clock and CW generates its own clock). Then you can set scope.clock.clkgen_freq to whatever you wish (within spec); for example if the target is clocked at 5 MHz, set scope.clock.clkgen_freq = 60e6 and you’ll get 12 samples per clock. However you’re now sampling asynchronously and in our experience, that leads to worse results, even if you’re getting more samples per clock. Colin wrote a paper that explores this: https://eprint.iacr.org/2013/294.pdf
With our newer CW-Husky, you are able to get more samples per clock (and still sample synchronously), using the scope.clock.adc_mul property. The “Clocking” section of the Husky intro notebook explains how.
But with CW-Lite/Pro, I would recommend that you stay with synchronous sampling at 1 or 4 samples per clock.
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Thank you very much. And what can I do if I want decouple sampling clock from the target as your said, by modifying the scope.clock.adc_src ?
modify adc_src to extclk_dir?
No, in this case you don’t want to source the sampling clock from the target, and so set scope.clock.adc_src = 'clkgen_x1', and set scope.clock.clkgen_freq to whatever sampling rate you want.
Again, this is not how we recommend to use CW.