[SOLVED] Unpopulated chip on the bottom of the CW Lite ?

I’m curious to know what the unpopulated SMD pads on the bottom of the CW Lite are for.

The silkscreen legend says its the FPGA SPI Flash.

Does it enhance the CW Lite if that chip is installed ?


I checked the CW Lit schematic and its listed as a X25XXSMD1, but I think that’s the generic PCB part name.

I can’t find a BOM for any of the boards on github, but I presume it must be there somewhere and potentially use on the CW Pro.

SPI flash chips are dirt cheap so I’d love to add this and also the missing SMD resistors that support its operation

It doesn’t improve anything… the SPI flash chip allows the FPGA to be configured at power-on. That’s basically if someone wants to use the CW H/W for their own purpose, there is no BOM P/N as it was never used/populated.

The CW itself downloads the FPGA bitstream on connection, which guarantees you get all FPGA upgrades w/o needing to use an external programmer (which would be needed to program the SPI flash). The download process itself is < 2 seconds so doesn’t really affect usability.

PS - The BOM is w/ hardware design files at github.com/newaetech/chipwhispe … te/pcb/bom .

Thanks Colin

I did see the BOM but the SPI Flash didn’t seem to be listed as its not part of the CWL

Hence I was curios what size it was

Just for reference, what size does it need to be if anyone wanted to fit it

PS. I won’t bother fitting one myself, because 2 secs to upload the firmware to the FPGA is not a problem

Ah I can’t remember off-hand… I had verified it worked during development, but basically somewhere there is some Xilinx docs telling you the minimum size you need to store a LX9 bitstream. You can potentially store multiple bitstreams too so larger ones can be used, but would have to confirm the LX9 supports several bitstreams. Or if you see another LX9 dev-board just use the same P/N they are using, it’s pretty common to have SPI-connected bitstream storage, and then you have a “known good” part. There is always potential issues of non-standard command sets which has bitten me a few times before.



I looked in the LX9 dev board docs and it says

128 Mb Micron Multi-I/O SPI Flash
The Spartan-6 FPGA LX9 Board includes a Micron Multi-I/O SPI Flash memory, part number N25Q128. The SPI Flash is
connected to the FPGA to support Quad-I/O (QIO), Dual-I/O (DIO), or Single-I/O (SIO) SPI configuration

So it looks like its a N25Q128