Hi Everyone. I am working on using the CWlite / CW305 to prototype a custom design for power side-channel testing and I was hoping to carry over the setup from the FPGA to the eventual ASIC. What would be the best way to go about this. Is it possible to bypass the FPGA on the CW305 to access the SAM3U bus through some of the GPIO? Or would it be more advisable to use the SS2 interface to connect directly to the CWlite with the 20 pin connector? Additionally are there any examples of loading the reference AES design onto the CW305 and communicating through SS2. Seems like all the SS2 reference notebooks are designed for other targets. Thanks in advance!
Very cool!
You have lots of options; it really depends what kind of interface you want to end up with on your target. There’s no “true” FPGA bypass on the CW305, but you could create a bitfile for the CW305 FPGA that simply routes the interface signals between the SAM3U and GPIOs that you can then connect to your ASIC.
Any of our SS2 example designs can easily be ported to the CW305; you just need to update the project to use the correct part and the correct pins, which are different on the CW305’s FPGA (compared to what you find in our repo that’s targeting the CW312-A35 target).
Bear in mind that this interface requires additional resources on the target side.
Lastly, you can also leverage the CW305 FPGA and create any interface you desire on your ASIC.