I am setting the clock frequency like this (on my CW-Lite, CW1173):
scope = cw.scope() time.sleep(0.025) scope.gain.db=55 scope.adc.samples = 24400 scope.adc.offset = 0 scope.adc.basic_mode = "rising_edge" scope.clock.clkgen_mul = 2 scope.clock.clkgen_div = 26 scope.trigger.triggers = "tio4" scope.io.tio1 = "serial_rx" scope.io.tio2 = "serial_tx" scope.io.hs2 = "disabled" scope.clock.adc_src = "clkgen_x4" scope.clock.reset_dcms() assert(scope.clock.clkgen_locked) print("Freq: %f"%scope.clock.adc_freq)
With these settings the printed freq is often (not always) 29538459
If I change mul or div it seems that this is no longer true and the printed freq varies a lot each run.
What does this mean? One theory is that the clock is unstable and the reported value is the source of truth - but how long could I trust that value, can the clock freq change during the run?
The reason I want to know is that I need to set an offset quite far in the future and this is done by specifying how many samples to skip - i.e a different samplerate results in me starting at the wrong offset.