ADC Spec and the traces

[Alex_Dewar]

Hi,

@helloyorld

The ADC of Chipwhisperer Lite is 105MS / s so its clock cycle is approximately 9.524 ns/sample. Also, it is 10-bit resolution, it takes 95.24 ns to acquire a sample. Is this correct?

It’s more correct to say the max sample rate of the Lite is 105MS/s - depending on the ADC clock, this might be (and is for the default examples, which capture at 7.37MHz * 4) less. If you want to see the sample rate, you can check scope.clock.adc_freq. Bits here are just talking about the ADC resolution, with 10 bits meaning there can be 1024 possible values for each sample.

@helloyorld

I read this post, the answer of the post said the Chipwhisperer captures 4x faster than the target. Does the target capture the signal too ? I thought only Chipwhisperer’s ADC capture the trace.

The ADC clock is usually based on the target clock as it greatly improve the quality of the data acquired. Typically, the ADC runs at 4x the speed of the target.

@helloyorld

When I was trying to capture the signal by get_last_trace in the default setting, it captures 5000 samples. For example, if the board capture 10000 samples, only the last 5000 are captured. Am I right? So if I want to capture the trace of whole process, I have to change the samples to 10000 ?

I’m not too familiar with how the data capture works on the FPGA, but I believe the capture starts when the ADC trigger is activated and ends once it has captured the requested number of samples. You can see how long the trigger is active for via scope.adc.trig_count.

Alex